Mathaikutty, Deepak A.: search on Z-Library

The world's largest scientific articles store. 70,000,000+ articles for free.

Don't use scam websites

1

A Functional Programming Framework for Latency Insensitive Protocol Validation

Syed Suhaib, Deepak Mathaikutty, Sandeep Shukla, David Berner, Jean-Pierre Talpin

Journal:

Electronic Notes in Theoretical Computer Science

Year:

2006

Language:

english

File:

PDF, 467 KB

english, 2006

2

Dataflow Architectures for GALS

Syed Suhaib, Deepak Mathaikutty, Sandeep Shukla

Journal:

Electronic Notes in Theoretical Computer Science

Year:

2008

Language:

english

File:

PDF, 457 KB

english, 2008

3

Mining metadata for composability of IPs from SystemC IP library

Deepak A. Mathaikutty, Sandeep K. Shukla

Journal:

Design Automation for Embedded Systems

Year:

2008

Language:

english

File:

PDF, 1.34 MB

english, 2008

4

SML-Sys: a functional framework with multiple models of computation for modeling heterogeneous system

Deepak A. Mathaikutty, Hiren D. Patel, Sandeep K. Shukla, Axel Jantsch

Journal:

Design Automation for Embedded Systems

Year:

2008

Language:

english

File:

PDF, 1.25 MB

english, 2008

5

[IEEE Proceedings. Ninth IEEE International High-Level Design Validation and Test Workshop (IEEE Cat. No.04EX940) - Sonoma Valley, CA, USA (2004.11.10-2004.11.12)] Proceedings. Ninth IEEE International High-Level Design Validation and Test Workshop (IEEE Cat. No.04EX940) - Effects of property ordering in an incremental formal modeling methodology

Syed Suhaib,, Deepak Mathaikutty,, Sandeep Shukla,

Year:

2004

Language:

english

File:

PDF, 697 KB

english, 2004

6

[IEEE 2007 IEEE International High Level Design Validation and Test Workshop - Irvine, CA, USA (2007.11.7-2007.11.9)] 2007 IEEE International High Level Design Validation and Test Workshop - Model-driven test generation for system level validation

Mathaikutty, Deepak A., Sumit Ahuja,, Ajit Dingankar,, Sandeep Shukla,

Year:

2007

Language:

english

File:

PDF, 259 KB

english, 2007

7

[IEEE 2007 5th IEEE/ACM International Conference on Formal Methods and Models for Codesign - Nice, France (2007.05.30-2007.06.2)] 2007 5th IEEE/ACM International Conference on Formal Methods and Models for Codesign (MEMOCODE 2007) - Type Inference for IP Composition

Mathaikutty, Deepak A., Shukla, Sandeep K.

Year:

2007

Language:

english

File:

PDF, 167 KB

english, 2007

8

[IEEE 2008 Ninth International Workshop on Microprocessor Test and Verification - Austin, TX, USA (2008.12.8-2008.12.10)] 2008 Ninth International Workshop on Microprocessor Test and Verification - Applying Verification Collaterals for Accurate Power Estimation

Ahuja, Sumit, Mathaikutty, Deepak A., Shukla, Sandeep

Year:

2008

Language:

english

File:

PDF, 204 KB

english, 2008

9

[IEEE Design Languages (FDL) - Stuttgart (2008.09.23-2008.09.25)] 2008 Forum on Specification, Verification and Design Languages - Formal transformation of a KPN specification to a GALS implementation

Suhaib, Syed, Jose, Bijoy A., Shukla, Sandeep K., Mathaikutty, Deepak A.

Year:

2008

Language:

english

File:

PDF, 391 KB

english, 2008

10

[IEEE 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07) - Bangalore, India (2007.01.6-2007.01.10)] 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07) - Model Based Test Generation for Microprocessor Architecture Validation

Kodakara, Sreekumar, Mathaikutty, Deepak, Dingankar, Ajit, Shukla, Sandeep, Lilja, David

Year:

2007

Language:

english

File:

PDF, 309 KB

english, 2007

11

[IEEE 2007 IEEE International Workshop on Microprocessor Test and Verification (MTV) - Austin, TX, USA (2007.12.5-2007.12.6)] 2007 Eighth International Workshop on Microprocessor Test and Verification - Assertion-Based Modal Power Estimation

Ahuja, Sumit, Mathaikutty, Deepak A., Shukla, Sandeep, Dingankar, Ajit

Year:

2007

Language:

english

File:

PDF, 170 KB

english, 2007

12

[IEEE 2005 Sixth International Workshop on Microprocessor Test and Verification - Austin, TX, USA (2005.11.3-2005.11.3)] 2005 Sixth International Workshop on Microprocessor Test and Verification - Automated Extraction of Structural Information from SystemC-based IP for Validation

Berner, David, Patel, Hiren, Mathaikutty, Deepak, Shukla, Sandeep

Year:

2006

Language:

english

File:

PDF, 162 KB

english, 2006

13

MCF: A Metamodeling-Based Component Composition Framework—Composing SystemC IPs for Executable System Models

Mathaikutty, Deepak A., Shukla, Sandeep K.

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2008

Language:

english

File:

PDF, 699 KB

english, 2008

14

[IEEE 2006 IEEE International SOC Conference - Austin, TX (2006.09.24-2006.09.27)] 2006 IEEE International SOC Conference - A Trace Based Framework for Validation of SoC Designs with GALS Systems

Suhaib, Syed, Mathaikutty, Deepak, Shukla, Sandeep

Year:

2006

Language:

english

File:

PDF, 126 KB

english, 2006

15

[IEEE 2009 10th International Symposium on Quality of Electronic Design (ISQED) - San Jose, CA, USA (2009.03.16-2009.03.18)] 2009 10th International Symposium on Quality of Electronic Design - Power estimation methodology for a high-level synthesis framework

Ahuja, Sumit, Mathaikutty, Deepak A., Singh, Gaurav, Stetzer, Joe, Shukla, Sandeep K., Dingankar, Ajit

Year:

2009

Language:

english

File:

PDF, 138 KB

english, 2009

16

[IEEE 2009 IEEE International SOC Conference (SOCC) - Belfast, Northern Ireland (2009.09.9-2009.09.11)] 2009 IEEE International SOC Conference (SOCC) - Accurate power estimation of hardware co-processors using system level simulation

Ahuja, Sumit, Mathaikutty, Deepak A., Lakshminarayana, Avinash, Shukla, Sandeep

Year:

2009

Language:

english

File:

PDF, 223 KB

english, 2009

17

[IEEE 2006 IEEE International SOC Conference - Austin, TX (2006.09.24-2006.09.27)] 2006 IEEE International SOC Conference - SoC Design Space Exploration through Automated IP Selection from SystemC IP Library

Mathaikutty, Deepak, Shukla, Sandeep

Year:

2006

Language:

english

File:

PDF, 68 KB

english, 2006

18

[IEEE 2006 IEEE International High Level Design Validation and Test Workshop - Monterey, CA, USA (2006.11.8-2006.11.10)] 2006 IEEE International High Level Design Validation and Test Workshop - Polychronous Methodology For System Design: A True Concurrency Approach

Suhaib, Syed, Mathaikutty, Deepak, Shukla, Sandeep, Talpin, Jean-pierre

Year:

2006

Language:

english

File:

PDF, 4.68 MB

english, 2006

19

[IEEE Design, Automation & Test in Europe Conference - Nice, France (2007.04.16-2007.04.20)] 2007 Design, Automation & Test in Europe Conference & Exhibition - Design Fault Directed Test Generation for Microprocessor Validation

Mathaikutty, Deepak A., Shukla, Sandeep K., Kodakara, Sreekumar V., Lilja, David, Dingankar, Ajit

Year:

2007

Language:

english

File:

PDF, 277 KB

english, 2007

20

[IEEE 2006 IEEE International High Level Design Validation and Test Workshop - Monterey, CA, USA (2006.11.8-2006.11.10)] 2006 IEEE International High Level Design Validation and Test Workshop - MMV: Metamodeling Based Microprocessor Valiation Environment

Dingankar, Ajit, Mathaikutty, Deepak, Kodakara, Sreekumar, Shukla, Sandeep, Lilja, David

Year:

2006

Language:

english

File:

PDF, 9.03 MB

english, 2006

21

XFM

Suhaib, Syed M., Mathaikutty, Deepak A., Shukla, Sandeep K., Berner, David

Journal:

ACM Transactions on Design Automation of Electronic Systems

Year:

2005

Language:

english

File:

PDF, 311 KB

english, 2005

22

EWD

Mathaikutty, Deepak, Patel, Hiren, Shukla, Sandeep, Jantsch, Axel

Journal:

ACM Transactions on Design Automation of Electronic Systems

Year:

2007

Language:

english

File:

PDF, 1.03 MB

english, 2007

23

[IEEE 2018 IEEE International Solid - State Circuits Conference - (ISSCC) - San Francisco, CA, USA (2018.2.11-2018.2.15)] 2018 IEEE International Solid - State Circuits Conference - (ISSCC) - An energy-efficient graphics processor featuring fine-grain DVFS with integrated voltage regulators, execution-unit turbo, and retentive sleep in 14nm tri-gate CMOS

Meinerzhagen, Pascal, Tokunaga, Carlos, Malavasi, Andres, Vaidya, Vaibhav, Mendon, Ashwin, Mathaikutty, Deepak, Kulkarni, Jaydeep, Augustine, Charles, Cho, Minki, Kim, Stephen, Matthew, George, Jain,

Year:

2018

Language:

english

File:

PDF, 1.47 MB

english, 2018

To build up a library is to create a life. It’s never just a random collection of books.

— Carlos María Domínguez

Official channel

Z-Library Desktop Launcher

Z-Library Since 2009 support@z-lib.do

EnglishРусскийEspañolItalianoελληνικάاللغة العربيةBahasa IndonesiaBahasa Malaysiaहिन्दीDeutschFrançaisPortuguêsУкраїнськаPolski中文繁體中文日本語Tiếng ViệtAzərbaycan DiliՀայոց լեզուภาษาไทยTürk Diliქართველიবাংলাپښتوతెలుగుاردو한국어SrpskiБългарски